Showing posts with label RISC/CISC. Show all posts
Showing posts with label RISC/CISC. Show all posts

April 11, 2025

Computer Architecture

 

RISC/CISC architecture

  1. Comparison between RISC and CISC:

 

                  RISC

CISC

Acronym

It stands for ‘Reduced Instruction Set Computer’.

It stands for ‘Complex Instruction Set Computer’.

Definition

The RISC processors have a smaller set of instructions with few addressing nodes. 

The CISC processors have a larger set of instructions with many addressing nodes.

Memory unit

It has no memory unit and uses a separate hardware to implement instructions.

It has a memory unit to implement complex instructions.  

Program

It has a hard-wired unit of programming.

It has a micro-programming unit.

Design

It is a complex complier design.

It is an easy complier design.

Calculations

The calculations are faster and precise.

The calculations are slow and precise.

Decoding

Decoding of instructions is simple.

Decoding of instructions is complex.

Time

Execution time is very less.

Execution time is very high.

External memory

It does not require external memory for calculations.

It requires external memory for calculations.

Pipelining

Pipelining does function correctly.

Pipelining does not function correctly.

Stalling

Stalling is mostly reduced in processors.

The processors often stall.

Code expansion

Code expansion can be a problem.

Code expansion is not a problem.

Disc space

The space is saved.

The space is wasted.

Applications

Used in high end applications such as video processing, telecommunications and image processing.

Used in low end applications such as security systems, home automations, etc.

Difference between RISC and CISC

S.No.

RISC

CISC

1.

Simple instruction set

Complex instruction set

2.

Consists of Large number of registers.

Less number of registers

3.

Larger Program

Smaller program 

4.

Simple processor circuitry (small number of transistors)

Complex processor circuitry (more number of transistors)

5.

More RAM usage

Little Ram usage

6.

Simple addressing modes

Variety of addressing modes

7.

Fixed length instructions

Variable length instructions

8.

Fixed number of clock cycles for executing one instruction

Variable number of clock cycles for each instructions

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